Skip to main content

Cpu Cache Microarchitect Jobs - Hiro

Browse 22+ Cpu Cache Microarchitect roles from companies hiring right now. Updated daily as new jobs land on Hiro. Salaries range from $0K to $0K based on listed pay.

22 Cpu Cache Microarchitect roles

Sorted by most recently posted.

Apple logo

CPU Microarchitect/RTL Engineer

Apple · Austin, TX

PerlPythonVerilog+1
Today
Apple logo

CPU Cache Microarchitect/RTL Engineer

Apple · Beaverton, OR

PerlPythonVerilog+1
Today
Cerebras Systems logo

Senior Front End Design Engineer (Microarchitecture)

Cerebras Systems · Bengaluru, India

FPGAGenerative AIMachine Learning+2
Yesterday
Apple logo

CPU Cache Microarchitect/RTL Engineer

Apple · Santa Clara, CA

PerlPythonVerilog+1
4d ago
Apple logo

CPU ML Microarchitect/RTL Engineer

Apple · Santa Clara, CA

PerlPythonVerilog+1
6d ago
Apple logo

CPU Cache Microarchitect/RTL Engineer

Apple · Beaverton, OR

PerlPythonVerilog+1
1w ago
Waymo logo

ML Microarchitect

Waymo · Mountain View, CA

$175K–$215K/yr

Machine LearningPythonScala
1w ago
Apple logo

CPU Microarchitect/RTL Engineer

Apple · Austin, TX

PerlPythonVerilog+1
1w ago
Apple logo

CPU Microarchitect/RTL Engineer - Execution, Load/Store

Apple · Santa Clara, CA

PerlPythonVerilog+1
1w ago
Apple logo

CPU Microarchitect/RTL Engineer

Apple · Santa Clara, CA

PerlPythonVerilog+1
2w ago
Apple logo

CPU Microarchitect/RTL Engineer - Fetch, Out of Order

Apple · Santa Clara, CA

PerlPythonVerilog+1
2w ago
Apple logo

CPU Power Management Microarchitect/RTL Engineer

Apple · Beaverton, OR

PerlPythonVerilog+1
2w ago
Cerebras Systems logo

Senior Front End Design Engineer (Microarchitecture)

Cerebras Systems · Sunnyvale, CA

$250K–$300K/yr

FPGAGenerative AIMachine Learning+2
2w ago
Apple logo

CPU Microarchitect/RTL Engineer - Execution, Load/Store

Apple · Beaverton, OR

PerlPythonVerilog+1
2w ago
Waymo logo

ML Microarchitect

Waymo · Mountain View, CA

$170K–$216K/yr

Machine LearningPythonScala
2w ago
Apple logo

CPU Microarchitect/RTL Engineer - Fetch, Out of Order

Apple · Beaverton, OR

PerlPythonVerilog+1
3w ago
Tenstorrent logo

RISC-V CPU Microarchitecture / RTL

Tenstorrent · US

$100K–$500K/yr

ComplianceMentoringVerilog+1
1mo ago
Tenstorrent logo

Sr Staff Engineer, CPU System Microarchitect

Tenstorrent · Austin, TX

$100K–$500K/yr

ComplianceVerilogVHDL
1mo ago
Tenstorrent logo

Sr Staff Engineer, CPU System Microarchitect

Tenstorrent · Bengaluru, India

ComplianceVerilogVHDL
1mo ago
Bayasystems logo

Microarchitect and RTL Design Engineer

Bayasystems · Cambridge, UK

IoTPythonSAFe+1
1mo ago
Bayasystems logo

Microarchitect and RTL Design Engineer

Bayasystems · Bengaluru, India

IoTPythonSAFe+1
4/3/2025
Bayasystems logo

Microarchitect and RTL Design Engineer

Bayasystems · Santa Clara, CA

IoTPythonSAFe+1
4/3/2025

Explore more cpu cache microarchitect roles

Tired of scrolling job boards?

Hiro scores every cpu cache microarchitect role against your profile so you only see the ones that actually fit. Free to start.