Skip to main content
Back to jobs

IOMMU/Virtualization & Memory Mapping Architect

External
HP logoHp · Spring, TX
$147K–$231K/yrFull-timeOn-siteToday
ComplianceFPGALeadershipLessMATLABMentoring
Cover LetterConnect

Prepare for this interview

Elite

AI-generated questions, company research, and talking points tailored to this role


Responsibilities

  • Architect IOMMU usage for device memory access and isolation
  • Define memory address translation strategies across CPU/GPU/NPU
  • Enable virtualization and hypervisor-based memory steering
  • Optimize DMA, shared buffers, and coherency models
  • Ensure security and isolation for multi-tenant / enterprise workloads
  • Collaborate on virtualization strategies for AI execution environments
  • Develops organization-wide architectures and methodologies for electrical hardware design and development across multiple platforms and organizations.
  • Leads part qualification processes through implementation of product quality plans, equipment inspections, factory witness testing, and manufacturing process qualifications.
  • Identifies and evaluates new technologies, innovations, and outsourced development partner relationships for alignment with technology roadmap and business value.
  • Drives integration of new technologies into projects and activities in the electrical hardware design organization.
  • Reviews and evaluates designs and project activities for compliance with technology and development guidelines and standards; provides tangible feedback to improve product quality.
  • Leads overall tracking and reporting of various electrical/hardware product related performance metrics and reports against the same.
  • Exercises independent judgment in resolving business issues and establishing functional policies for guidance.
  • Provides domain-specific expertise and overall electrical/electronic hardware and platform leadership and perspective to cross-organization projects, programs, and activities.
  • Leverages functional expertise in guiding strategy and setting functional policy and direction, while helping the team in realization of these operational and strategic plans.
  • Provides guidance and mentoring to less- experienced staff members to set an example of electrical hardware design and development, innovation, and excellence.
  • Education & Experience Recommended
  • Four-year or Graduate Degree in Electrical Engineering, or any other related discipline or commensurate work experience or demonstrated competence.
  • Typically has 10+ years of work experience, preferably in electrical design and tools, software packages, architecture of electronic hardware, or a related field.
  • Preferred Certifications
  • NA
  • Knowledge & Skills
  • Memory design/architecture
  • Computer Engineering
  • Computer Science
  • Debugging
  • Electrical Engineering
  • Electronic Engineering
  • Electronics
  • Field-Programmable Gate Array (FPGA)
  • Hardware Architecture
  • Hardware Design
  • MATLAB
  • Mechanical Engineering
  • New Product Development
  • Oscilloscope
  • Physics
  • Printed Circuit Board
  • Schematic Capture
  • Simulations
  • Systems Design
  • Cross-Org Skills
  • Effective Communication
  • Results Orientation
  • Learning Agility
  • Digital Fluency
  • Customer Centricity
  • Impact & Scope
  • Impacts large functions and leads large, cross-division functional teams or projects.
  • Complexity
  • Provides highly innovative solutions to complex problems within established policy.
  • Disclaimer
  • This job description describes the general nature and level of work performed in this role. It is not intended to be an exhaustive list of all duties, skills, responsibilities, knowledge, etc. These may be subject to change and additional functions may be assigned as needed by management.
  • The pay range for this role is $147,050 to $230,850 USD annually with additional
  • opportunities for pay in the form of bonus and/or equity (applies to United
  • States of America candidates only). Pay varies by work location, job-related
  • knowledge, skills, and experience.

Benefits

HP offers a comprehensive benefits package for this position, including:Health insuranceDental insuranceVision insuranceLong term/short term disability insuranceEmployee assistance programFlexible spending accountLife insuranceGenerous time off policies, including;4-12 weeks fully paid parental leave based on tenure11 paid holidaysAdditional flexible paid vacation and sick leave (US benefits overview[https://hpbenefits.ce.alight.com/])The compenPaid time offFlexible scheduleEquity / stock optionsPerformance bonusParental leave

Additional Information

IOMMU/Virtualization & Memory Mapping Architect Description - Job Summary - This role ensures that all compute engines can share memory efficiently, securely, and dynamically, unlocking real AI performance on heterogeneous systems. This role owns system level memory virtualization, mapping, and isolation which enables secure and performant multi-engine execution. This role is responsible for developing organization-wide architectures and methodologies, identifying and evaluating emerging technologies and partnerships, and aligning these with technology roadmaps and business value. The role offers tangible feedback to enhance product quality, while overseeing tracking and reporting of product-related performance metrics. The role leverages functional expertise to shape strategy and policy, facilitating the realization of operational and strategic plans.


Your Match

How well this role fits your profile.

Company Intel

What employees say

Worked at HP? Share your experience

Interested in this role?

Apply on the company's website.

Cover LetterConnect