Senior Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)

Responsibilities

• You will architect, design, layout, measure and productize ultra-deep sub-micron-based CMOS products.
• You will lead efforts for a large block on a complex chip, mentor team members and track deliverables, participate in peer review of complex IC designs and provide solid design methodology from conception to production.
• You will also collaborate with packaging and hardware design team to ensure signal and power integrity specifications are met.
• You will develop high speed AMS circuits and best-in-class products that push the boundaries of what is possible.

Requirements

• BSEE degree with 12+ years of experience or equivalent or an MS degree with 8+ years of experience, or equivalent or a PhD with 5+ years of experience, or equivalent
• Design, simulation and measurement of high speed ICs in at least 3 areas below:
• High Speed Serial Links utilizing serializers, deserializers, and data converters, voltage regulators, output drivers, phase locked loops, clock transmission/propagation, Opamps, programmable gain amplifiers, and equalization
• Experience with electrical transceiver applications including backplane and cable communications
• Experience with FinFET technology
• High-frequency layout experience a plus: Passive component design: inductors,
• transformers, transmission-lines, etc.
• Floorplanning (power/ground, digital/analog signal routing, etc.) experience
• Custom transistor layout experience
• Experience designing for manufacturability
• Experience with ESD laboratory practices and methodology
• Experience with Cadence (virtuoso), Spectre/APS/SpectreX, Matlab, EMX
• Experience with mixed-signal simulations in AMS
• Why Cisco?
• We are Cisco, and our power starts with you.
• Message to applicants applying to work in the U.S. and/or Canada:
• The starting salary range posted for this position is $191,400.00 to $281,400.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.
• U.S. employees are eligible for paid time away as described below, subject to Cisco's policies:
• 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
• 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
• Non-exempt employees** receive 16 days of paid vacation time per full

Benefits

Additional Information

The application window is expected to close on: 07/28/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . This is a hybrid role with three days per week at our San Jose, CA office. Acacia designs intelligent transceivers using advanced signal processing and photonic integration for the 100G, 400G and 1T bit speed fiber optic transmission market deployed in data center, metro, long-haul and ultra-long haul telecommunication networks. Meet the Team We are Mixed-signal IC design group that develops high speed ()25Gb/s), and high accuracy, analog designs for optical communications products. We optimize design that will integrate into the ASIC. Our team interacts with other Acacia groups including digital/DSP design, system design, package design, and module design.

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