PCIe Senior/Lead Software Engineer

Responsibilities

• As part of this team, you'll work on projects like:
• Bringing up pcie links on new hardware designs
• Tuning pcie parameters on root ports, bridges, and end points
• Modifying the linux pci drivers and virtual memory allocation
• Using AER and DPC to improve error visibility and resiliency
• Developing userspace software that mediate between networking ASICs, FPGAs, and PCIe bridges.
• Measuring hardware read and write performance
• Develop automated tests using C, C++ and Python to validate your features.
• Strong engineering and Computer Science fundamentals.
• 8+ years fluency in C or C++. Python experience an added bonus.
• Solid understanding of PCIe hardware and software drivers
• PCIe state machine, ltssm, tlp, credit flow control knowledge a plus
• Experience with PCIe switches
• Significant hands-on experience diagnosing problems, troubleshooting issues, and fixing bugs in low-level firmware
• Compensation Information
• The new hire base pay for this role has a pay range of $140,000 to $210,000.
• Arista offers different pay ranges based on work location, so that we can offer consistent and competitive pay appropriate to the market. The actual base pay offered will be based on a wide range of factors, including skills, qualifications, relevant experience, and work location.
• #LI-SP1

Benefits

Additional Information

Who You'll Work With Operating right where hardware meets software, the Platform team builds the foundation for our networking ASICs and supporting infrastructure. PCIe software engineers write the code that manages high speed communication between hardware components in our switches. We work with hardware, diagnostics, and software engineers to maximize bandwidth and improve reliability on the PCIe links.

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Company Intel

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