ASIC Design Verification Emulation Engineer

Responsibilities

• Set vision and strategy for ASIC verification methodology and execution across multiple programs and product lines.
• Serve as technical authority and mentor for verification teams, fostering technical excellence and innovation.
• Lead architecture and implementation of scalable, reusable verification infrastructure and methodologies.
• Drive cross-functional initiatives to improve verification efficiency, quality, and coverage at scale.
• Influence ASIC architecture and design to enable robust verification and high-quality silicon.
• Serve as subject matter expert and advisor on industry trends, best practices, and new technologies.
• Provide technical leadership in root cause analysis and resolution of complex issues during bring-up and post-silicon validation.

Requirements

• Bachelors + 7 years of related experience, or Masters + 4 years of related experience, or PhD + 1 year of related experience.
• Experience in System Verilog, UVM, and verification methodologies including emulation.
• Experience architecting verification strategies for complex ASIC programs.
• Experience leading verification teams or projects.
• Experience in scripting (Python, Perl) and C/C++ programming language.
• Experience in data center, Hyperscalers, or AI Networking technologies.
• Author or contributor to industry standards or best practices in ASIC verification.
• Deep expertise in multiple protocols and large-scale SoC architectures.
• Experience with advanced emulation, prototyping, and formal verification tools at scale.
• Experience with silicon bring-up and post-silicon debug.
• Strong leadership, communication, and mentoring skills.
• Why Cisco?
• We are Cisco, and our power starts with you.
• Message to applicants applying to work in the U.S. and/or Canada:
• The starting salary range posted for this position is $165,000.00 to $241,400.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.
• U.S. employees are eligible for paid time away as described below, subject to Cisco's policies:
• 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
• 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
• Non-exempt employees** receive 16 days of pa

Benefits

Additional Information

The application window is expected to close on: 07/10/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . This role requires being onsite in San Jose, CA at least 4 days/week. Meet the Team The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco's core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms-like Silicon One-are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development-from design to qualification to production-is within our team, we're able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.

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