CPU HVM Functional-Test Verification Engineer

Requirements

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
• 2+ years of experience with a Bachelor's degree / Master's degree, or PhD.
• Strong scripting and programming skills in languages, particularly Python, Perl and C/C++.
• Robust understanding of CPU architecture and microarchitecture fundamentals.
• Proficiency in System Verilog and UVM, and with experience debugging on any micro-architecture issue in pre-silicon environment
• Strong problem-solving and analytical skills with a creative approach to debugging and resolving issues.
• Effective communication and collaboration skills to work cohesively in a dynamic, fast-paced environment.
• Self-motivated individual with a passion for innovation and continuous learning.
• Proven expertise in TAP (Test Access Port)
• Prior knowledge in ASIC or FPGA design verification, particularly with x86 CPU designs.
• Prior knowledge/background in post-silicon validation/debug is an added advantage
• Prior experience with using fault-simulator is an added advantage
• Job Type:
• Experienced Hire
• Shift:
• Shift 1 (Malaysia)
• Primary Location:
• Malaysia, Penang
• Additional Locations:
• Business group:
• Posting Statement:
• Position of Trust
• N/A
• Work Model for this Role
• This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
• *

Benefits

Additional Information

Job Details: Job Description: As a CPU HVM Functional-Test Verification Engineer, you will be part of the DFT team focusing on validating DFT for manufacturing functional testing and delivering functional test content for the manufacturing of Intel's next generation CPU IP designs. Besides being part of DFT verification team, you will also have the opportunity to work in close partnership with CPU design/architecture, SOC design and manufacturing teams. Job scopes for this position are as follow: Validates DFT for manufacturing functional testing Develops functional tests to qualify manufacturing goals of next generation Intel CPU IP designs Uses fault-simulator to measure coverage effectiveness of functional tests / understand and patch test gaps accordingly before high volume manufacturing Replicates, root causes, and debugs test or design issues in pre-silicon environment. Finds and implements corrective measures to resolve failing tests.

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Company Intel

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