Senior Staff Engineer, Design For Test - Automation & Infrastructure

Requirements

• Bachelor's degree in Computer Science, Electrical Engineering or related fields with 5-10 years of experience,
• or Master's/PhD with 5-8 years of experience. Strong DFT background with at least 5+ years in custom chip design,
• including hands-on experience with SCAN, MBIST, validation, STA, and IP-DFX flows-essential for understanding
• what needs improvement. Proficiency in Python programming for tool development, data analysis, and automation.
• Strong Unix/Linux skills including shell scripting (csh, bash), make, sed, awk, and system administration.
• Experience with data analysis, visualization, and dashboard creation. Time coordination skills with ability
• to track multiple concurrent efforts and drive cross-functional initiatives. Understanding of regression management,
• continuous improvement, and DevOps practices. Excellent problem-solving abilities to identify systematic issues
• and architect scalable solutions. Strong communication skills to gather requirements from engineers and
• present insights to management.
• **Optional but strongly desired: Since Marvell is a fundamental leader in AI chip design,
• knowledge of and experience with AI tools and techniques for assistance with
• tool development, code generation, and data analysis, with understanding of strengths and weaknesses of their use,
• would be highly valuable.**
• Expected Base Pay Range (CAD)
• 132,800 - 177,100, $ per annum
• Additional Compensation and Benefit Elements
• All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
• Interview Integrity
• To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
• This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to acc

Additional Information

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. This is an existing vacancy. Your Team, Your Impact Your Team, Your Impact As a DFT Senior Staff Engineer with Marvell, for DFT Automation & Infrastructure, you'll be a member of the Custom Silicon Engineering team. This team is a leader in large multi-die designs driving high compute performance and acceleration in AI, 5G, and 6G markets. This unique role sits above the daily DFT execution layer, focusing on automation and intrastructure development, project tracking, regression management, and tool creation to enhance team productivity and design quality across multiple concurrent projects. What You Can Expect What You Can Expect This is a "meta-DFT" position where your deep DFT expertise will be leveraged to identify bottlenecks, inefficiencies, and improvement opportunities rather than performing hands-on DFT implementation. You'll architect and develop automated tools and frameworks that track project group progress across multiple designs, manage large-scale regression runs, analyze DFT metrics and trends, and provide actionable insights to engineering teams. Your responsibilities include designing Python-based infrastructure for workflow automation, creating dashboards for real-time project visibility, establishing best practices and standardized methodologies, and developing tools that scale DFT execution across the organization. You'll work closely with DFT engineers to understand pain points and translate them into systematic solutions, while also mentoring teams on methodology adoption and continuous improvement practices.

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