ASIC DFT Engineer

Responsibilities

• Responsible for implementing the Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug and diagnostics needs of the designs.
• Responsible for development of innovative DFT IP in collaboration with the multi-functional teams, and play a key role in full chip design integration with the testability features coordinated in the RTL.
• Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation and post silicon validation flows.
• Your team will participate in the creation of Innovative Hardware DFT & physical design aspects for new silicon device models, bare die & stacked die, driving re-usable test and debug strategies.
• The job requires the candidate to have the ability to craft solutions and debug with minimal mentorship.

Requirements

• Bachelor's or a Master's Degree in Electrical or Computer Engineering required with at least 5 years of experience.
• Prior experience working in the latest innovative trends in DFT, test and silicon engineering.
• Prior experience with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan.
• Prior experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime
• Prior experience working with Gate level simulation, debugging with VCS and other simulators.
• Post-silicon validation and debug experience; Ability to work with ATE patterns, P1687
• Verilog design experience - developing custom DFT logic & IP integration; familiarity with functional verification
• Test Static Timing Analysis
• Post silicon validation using DFT patterns.
• Verification skills include, System Verilog Logic Equivalency checking and validating the Test-timing of the design
• Why Cisco?
• We are Cisco, and our power starts with you.
• Message to applicants applying to work in the U.S. and/or Canada:
• The starting salary range posted for this position is $152,500.00 to $219,200.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.
• U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid

Benefits

Additional Information

The application window is expected to close on: 09/01/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . Meet the team: The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco's core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms-like Silicon One-are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development-from design to qualification to production-is within our team, we're able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.

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