ASIC Mix-Signal Production Test Development Engineer

Requirements

• Experience: Application of integrated circuit testing on ATE platforms such as Advantest V93000
• Application of Jira for bug tracking and Git for source code and revision control
• Application of programming languages such as Python, Make, Bash, and object-oriented programming
• Pay Range:
• The annual pay range for this position is C$109,000 - C$174,000.
• #LI-BS1
• At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.
• Ciena is an Equal Opportunity Employer, including disability and protected veteran status.
• If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

Benefits

Additional Information

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We're a technology company that leads with our humanity-driving our business priorities alongside meaningful social, community, and societal impact. Ciena is advancing next-generation optical networking through highly integrated ASIC technologies. This role contributes directly to the development of production test solutions for mixed-signal ASICs used in the Wavelogic product line. The position plays a key role in ensuring product quality, scalability, and manufacturing efficiency through robust test development. How you will make an impact: Design and implement production test solutions for mixed-signal ASICs Develop and maintain test environment infrastructure using C and SystemVerilog Collaborate with analog and digital design teams to create and execute verification plans Develop test cases, scripts, and programs for wafer and package testing based on design specifications Debug and analyze test failures to determine root causes and improve product quality Optimize test methodologies to improve yield and reduce test time Build and automate workflows and test frameworks to improve development efficiency The must haves: Education: Bachelor's degree in Electrical Engineering or Computer Engineering Experience: 5+ Years in application of SystemVerilog, UVM, SVA, C/C++, and industry simulators Application of test techniques for DAC, ADC, and PLL components Application of scripting for task automation Background in high-speed and mixed-signal ASICs Demonstrated communication skills in cross-functional environments Ability to manage multiple concurrent tasks or projects

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