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Senior Staff Verification Engineer

External
Axiado logoAxiado · Hyderabad, India
Full-timeOn-site1mo ago30+ days old, may be filled
AssemblyDocumentationFPGALeadershipPerlPython
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Responsibilities

  • Project Leadership
  • Help develop test plan definition and development;
  • Micro-architecture design verification, RTL verification, and documentation;
  • Top-level and block-level performance verification, power, and use-case verification; and
  • Support test program development, chip validation, and chip life until production maturity.
  • Team Management and Building
  • Collaboration with firmware, software, DV, FPGA, DFT, SoC integration, and backend teams throughout various stages of ASIC development.

Requirements

  • 10+ years of experience in SOC verification and UVM environment development with ARM Processor ( U 85/ U 65/ M55 );
  • Proficient in test plan definition and testcase development in C/Assembly/SystemVerilog;
  • Expertise in verifying design at RTL level and gate-level simulation;
  • Good understanding of coverage analysis, performance verification and use-case verification;
  • Experience in functional test vector development and post-silicon bring-up/debug;
  • Fluency with scripting languages (e.g., Perl, Python, Shell); and
  • Preferred: knowledge of Power Aware verification is a plus.
  • Can work from Hyderabad, India, San Jose, USA or Taipei, Taiwan.
  • Additional Information
  • Axiado is committed to attracting, developing, and retaining the highest caliber talent in a diverse and multifaceted environment. We are headquartered in the heart of Silicon Valley, with access to the world's leading research, technology and talent.
  • I'm interested

Additional Information

Senior Staff Verification Engineer position is your opportunity to join one of the industry's leading companies in Smart Edge SoCs for network/systems control, management security systems, and IIoT. You should have prior knowledge and experience with UVM verification and UVM environment development. You will be responsible for RTL SoC/Subsystem verification of ARM based CPUs, and work on industry-standard verification methodologies like UVM, Portable Stimulus and Formal verification flows. You will report to the Director of Engineering, Verification.


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