Packaging Engineer (Substrate Design and Layout)

Requirements

• Proficient in EDA tools, including Cadence SIP/Allegro, AutoCAD, CAM, and Valor for substrate and package design.
• Solid understanding of advanced packaging design and manufacturing processes, particularly for wire bonding, flip chip and substrate-based technologies.
• Listening/speaking/writing in English: Fluent~upper intermediate
• Strong communication and interpersonal skills to effectively collaborate across cross-functional and global teams.
• Familiar with substrate fabrication and manufacturing workflows, including design rule interpretation and vendor engagement.

Additional Information

Optimize die bonding pad, flip chip die plot, and substrate layout to streamline design complexity and reduce cost for ASIC and SiP packaging solutions, including SSD/PSSD NAND BGA, uSD, SD/SD express and USB products. Support the development and integration of new planform packaging technologies/new NAND generation, new ASIC, Emphasis is placed on interposer/substrate/board co-design, design rule definition, and cross-functional collaboration. Conduct substrate layout feasibility studies, die fitment analysis based on Org. playbook, and prepare comprehensive design documentation. Maintain and manage design libraries, and generate accurate bonding diagrams to support layout and assembly processes. Collaborate closely with hardware, assembly, and packaging engineering teams across multiple Sandisk sites to enable new product development and continuous substrate design improvement. Interface with assembly houses and substrate vendors to perform design reviews, ensure compliance with design rules, and support manufacturability. Support to department automation system developing. REQUIRED: Master's or Bachelor's degree in Materials Science, Electrical/Electronics Engineering, or other relevant engineering or science disciplines. Up to 5 years of design experience in semiconductor packaging, substrate design, or related fields. Familiarity with WB version design and advanced packaging technologies such as FCBGA, MCM, or 2.5D designs is a plus. Strong foundation in design principles, materials, thermal, PKG warpage/BLR and electrical performance considerations. Ability to work collaboratively in cross-functional teams and communicate effectively across disciplines.

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Company Intel

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