Pre-si Verification Engineer

Responsibilities

• Define and develop SoC / subsystem / IP verification plans aligned to architecture specifications
• Build and maintain System Verilog/UVM-based testbenches and verification environments
• Develop constrained-random and directed test scenarios and validation content
• Execute simulation and emulation-based verification to validate functionality, power, and performance
• Perform debug and root-cause analysis of RTL and testbench failures in pre silicon environment
• Analyze and drive functional, code, and assertion coverage closure
• Collaborate with architecture, RTL design, post silicon, and validation teams
• Document verification plans and participate in design/verification reviews
• Continuously improve verification methodology, infrastructure, and automation flows
• Incorporate learning from post silicon validation to enhance future verification coverage
• Good at leveraging AI across verification coding, debugging , quality sign-off requirements.
• Minimum 5 to 12 year of relevant experience in SoC/subsystem/IP level verification
• Qualifications BE or B Tech or M Tech ECE or Computer Science with 5 to 12 years front-end pre-si verification.
• Job Type:
• Experienced Hire
• Shift:
• Shift 1 (India)
• Primary Location:
• India, Bangalore
• Additional Locations:
• Business group:
• Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.
• Posting Statement:
• Position of Trust
• N/A
• Work Model for this Role
• This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
• *

Requirements

• Experience : 5 to 12 years

Additional Information

Job Details: Job Description: The Client Engineering Group is looking for a highly motivated Pre-Si SoC Verification Engineer to join the compute die frontend design and verification team for the next generation of Client SOC. In this role, the candidate's responsibilities include, although not limited to: Responsible for ensuring functional correctness and quality of SoC designs before silicon tape-out, through simulation, emulation, and advanced verification methodologies. The role involves testbench development, coverage-driven verification, and debug of complex SoC architectures.

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