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EDA Tools Hardware Engineer

External
Intel logoIntel · California, Santa Clara
Full-timeHybrid1w ago
AssemblyComplianceLeadershipLinuxRouting
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Responsibilities

  • Full Chip Implementation Flow Development
  • Develop and maintain full-chip physical implementation flows including:
  • Floor planning and partitioning strategies
  • Hierarchical block integration
  • Chip-level placement and routing coordination
  • Power grid planning and analysis
  • Clock tree synthesis (CTS) strategy integration
  • Enable scalable SoC assembly flows for multi-block and multi-power domain designs.
  • Define methodology for hierarchical design reuse and integration

Requirements

  • Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field with 6+ years of experience; or a Master's degree with 4+ years of experience; or a PhD with 2+ years of experience
  • Physical design fundamentals (I.e. placement, routing)
  • Clock tree synthesis (CTS)
  • Full-chip integration methodologies using Innovus
  • Static timing analysis (STA)
  • Power grid design and IR drop concepts
  • Experience with large SoC or multi-block design implementation flows
  • Experience scripting and automation skills in Linux environments
  • Job Type:
  • Experienced Hire
  • Shift:
  • Shift 1 (United States of America)
  • Primary Location:
  • US, California, Santa Clara
  • Additional Locations:
  • US, California, Folsom, US, Oregon, Hillsboro, US, Texas, Austin
  • Business group:
  • Posting Statement:
  • Position of Trust
  • N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel .Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USDWork Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*Health insurancePaid time offEquity / stock optionsPerformance bonus

Additional Information

Job Details: Job Description: The Role and Impact Join Intel's world-class team as an EDA Tools Hardware Engineer, where you will play a pivotal role in shaping the future of silicon innovation. This position directly contributes to the enablement and adoption of cutting-edge hardware design tools, flows, and methodologies. Your work will enhance the efficiency of design processes and optimize power, performance, and technology node advancements. As part of Intel, you will have the unique opportunity to collaborate with EDA vendors, define next-generation design tools, and contribute to groundbreaking innovations that enrich lives worldwide.

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