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Principal Design Engineer

External
Micron Technology logoMicron Technology · San Jose, CA
$176K–$298K/yrFull-timeOn-siteToday
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About the role

Lead development and optimization of high-speed IO/datapath circuits for next-generation NAND flash. Drive architecture decisions, manage layout and parasitic extraction, coordinate silicon bring-up and yield improvements, align specifications with customers, and mentor engineers while presenting results to expert panels.


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