Principal Analog Circuit Designer

Requirements

• Experience with 2.5D or 3D electromagnetic modeling tools such as HFSS or EMX
• Experience designing high-performance clock generation and distribution circuits
• Experience with mixed-signal design validation using advanced probing and test equipment
• #LI-BS1
• Pay Range:
• The annual pay range for this position is C$114,000 - C$182,000.
• At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.
• Ciena is an Equal Opportunity Employer, including disability and protected veteran status.
• If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

Benefits

Additional Information

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We're a technology company that leads with our humanity-driving our business priorities alongside meaningful social, community, and societal impact. Ciena's WaveLogic family of products plays a critical role in enabling high-speed optical fiber transmission and advancing broadband connectivity solutions. This position contributes to the design and delivery of advanced analog circuits that power next-generation coherent optical technologies. The role is part of a team with a long history of innovation in high-speed data conversion and optical communication systems. How you will make an impact: - Lead design of advanced high-speed analog circuits in deep-submicron CMOS and/or BiCMOS technologies - Deliver optical-line-facing ADC circuits interfacing with optical modulators and detectors within mixed-signal IP blocks - Develop precision analog circuits for control and monitoring functions within integrated solutions - Evaluate circuit topologies and recommend implementation approaches based on trade-off analysis - Define and contribute to circuit requirement specifications in collaboration with cross-functional teams - Design multi-phase clock generation and distribution circuits through to full GDSII delivery - Perform lab-based characterization of analog circuits from test chips through full product implementation The must haves: - Education: Master's degree in Electrical Engineering or Computer Engineering or other applicable scientific discipline - 7+ years of experience contributing to designs in advanced CMOS and/or BiCMOS technology - A highly motivated self-starter able to work independently and collaborate within a team environment - Ability to address complex technical problems using methodical approaches - Strong written and verbal communication skills in English - Utilization of design tools such as Cadence Virtuoso, Calibre, STAR-RC, and MMSIM for analog design - Demonstrated delivery of analog circuit designs at mm-wave frequencies

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