FPGA IP Design and Verification Engineer

Responsibilities

• FPGA IP Design & Validation using Verilog.
• Support the FPGA post-silicon system validation group in ongoing and upcoming projects or new methodology initiatives.
• Assist in the development and implementation of innovative validation and debugging solutions.
• Document technical specifications clearly and maintain organized records of project progress.
• Collaborate closely with validation team members to understand and improve workflows and methodologies.
• Prepare and present updates and findings to stakeholders as required .

Requirements

• 7+ years of experience in Semiconductor IP Design.
• Familiarity with HDL languages (VHDL, Verilog, SystemVerilog ).
• Experience or knowledge in scripting languages such as Tcl , Perl, or Python.
• Prior experience or exposure to FPGA tools (Quartus or Vivado ) would be advantageous .
• Strong willingness to learn new skills and technologies.
• Ability to work collaboratively within a team environment.
• Good communication skills and ability to clearly present project details and outcomes.
• Job Type:
• Regular
• Shift:
• Shift 1 (India)
• Primary Location:
• Bengaluru, Karnataka, India
• Additional Locations:
• Posting Statement:

Additional Information

Job Details: Job Description: We are seeking a highly motivated intern currently pursuing or holding a Master's degree in Electronics or Computer Engineering with a specialization in VLSI. The ideal candidate will possess foundational knowledge of VLSI design and validation, with additional experience in high-speed design challenges seen as advantageous . This Position provides an exciting opportunity to engage directly with post-silicon system validation activities for next-generation Altera FPGA products, specifically focusing on high-speed transceiver protocols.

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