Sr. Staff Engineer, Hardware Design, Test Ops

Requirements

• Bachelor's degree in Computer Science, Electrical Engineering or related fields and at least 9 years of related professional experience; Master's degree and at least 6 years of related experience; PhD with 4 years of related experience.
• At least 5 years of experience of designing high-speed & high-density printed circuit boards or MLO containing high-speed serial and memory interfaces.
• At least 3 years of experience signal integrity, and power integrity simulation experience.
• Preferred Qualification:
• Strong knowledge of PCIe, DDR3/4 and NAND memories topologies and PCB or MLO layout review with high-speed design rule.
• Evaluate stack-up, routing topology, via structure, and impedance control, Define and review design guidelines for high-speed channels.
• Familiar with simulation tool Keysight ADS, Ansys HFSS
• Additional Compensation and Benefit Elements
• All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
• Interview Integrity
• To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
• #LI-SYU

Additional Information

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Hardware Design Senior Staff Engineer with Marvell, you'll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing reliable hardware for wafer sort. You'll involve the design review of the MLO (multi-layer organic) and PCB (printed circuit board) of probe cards for many different groups at Marvell. Additionally, Marvell is designing more complex chips than our competitors, for higher speeds than anyone else. We're on the leading edge of this technology and you'll love being a part of this. What You Can Expect You have a strong foundation in signal integrity fundamentals, transmission line theory, impedance control, and high-speed MLO/PCB design. You are experienced with differential signaling, PAM4/NRZ channels, and RF/microwave concepts. Proficiency with industry-standard simulation tools such as Keysight ADS, Cadence Sigrity, or Ansys HFSS is required. Familiarity with MLO design with ATE platforms including Advantest V93000 or Teradyne UltraFLEX is a plus, as is prior experience in semiconductor ATE test hardware, probe card design, load board design, or high-speed SerDes hardware development.

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