System Hardware (SIPI) Engineer, Principle

Requirements

• General Requirements:
• Bachelor's/Master's degree in Electrical engineering in Electrical Engineering or related field.
• Deep expertise in electromagnetic theory, transmission lines, RF concepts, and analog design principles.
• Strong background of high speed SerDes (Architecture, Functional Blocks, Link optimization) and standards (IEEE 802.3, OIF).
• 6+ years of industry experience in SI/PI, EMI, and high‑speed design.
• Proficiency with SI/PI simulation tools (HFSS, SIwave, ADS, HSPICE, Q3D, etc.).
• Be able to adjust/modify PCB layout for trial runs during design optimization prior releasing the guideline to layout engineers.
• Strong track record of technical leadership, innovation, and cross‑functional collaboration.
• Excellent communication skills for technical presentations and customer engagement.
• Experience of using Vector Network Analyzer (VNA), probe station, calibration and measurement.
• Additional Compensation and Benefit Elements
• Competitive salary, plus 13th-month salary and performance-based bonus
• RSUs (Restricted Stock Units) for new joiners and on-going annually
• Premium health & accident insurance for you and your family (spouse and children)
• Annual medical che

Benefits

Additional Information

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell Technology, Inc. is a data infrastructure semiconductor solutions provider. The Company is principally engaged in delivering the data infrastructure technology that connects the world. The Company moves, stores, processes and secures data with semiconductor solutions designed for its customer needs. The Company is engaged in providing high-speed analog and mixed signal semiconductor solutions and optical interconnects for communication infrastructure in long-haul, metro, datacenter for cloud markets. We address the bandwidth, capacity and power issues faced by cloud computing, mega data center from 10Gig to multi-hundred-Gig (>100G) network environments. By leveraging our core competencies in advanced analog circuit design, advanced DSP (Digital Signal Processing), advanced packaging and process technologies, the company's products being first to market in many of key areas, including opto-electronics and DSP based transceivers providing most advanced chips and subsystems solutions to address today's and future's multi-100Gig interconnect requirements for the ever-increasing demand of higher data rates. We are seeking talented individuals to work on solving technical challenges with the most outstanding group of collaborators in the industry. Join our team of experts and make a difference in an exciting career opportunity. What You Can Expect As a Principal Signal & Power Integrity Engineer , you will lead our RF designs, analysis, and optimization of high‑speed interconnects and power distribution networks across advanced PCBs, De-embedded structure, and Package for silicon characterization/validation of high speed SerDes SoC products. You will provide technical leadership in SI/PI methodology development, drive innovation in next‑generation PCB and system architectures, and mentor junior engineers while collaborating across design, product, and customer teams. This role requires deep technical expertise, strategic vision, and the ability to influence both engineering practices and organizational direction. Detailed responsibilities include: Define and lead SI/PI activities and analysis for PCBs, De-embedded structure, and system‑level interconnects. This includes working with PCB layout engineers and PCB fabs to understand design constraints/limitations and define layout guidelines for best performance. Participance with layout lead to review and approve final Gerber files for PCB fabrication. Develop and refine methodologies for modeling, simulation, and measurement correlation of signal and power integrity, minimize the gap between simulation and measurement. Drive innovation in I/O and channel architectures to enable higher speeds, densities, and lower IR drop and power noise. Collaborate across multiple teams (packaging, system, validation) to define test fixtures for silicon characterization, silicon debug, system robustness testing, etc. Mentor and coach engineers , providing technical guidance and fostering a culture of excellence. Perform path‑finding research in electromagnetic modeling, PDN optimization, and advanced packaging. Support customers with SI/PI expertise and ensure product performance meets application requirements

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