FPGA Silicon Validation Engineer

Requirements

• Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related discipline.
• Industry experience in post‑silicon validation, silicon bring‑up, or PHY design and development roles.
• Strong hands‑on experience validating high‑speed interfaces and PHYs such as DDR, LPDDR, MIPI, LVDS, and GPIO.
• Deep understanding of high‑speed signal integrity, power integrity, timing, and analog/mixed‑signal behaviors.
• Proven expertise using advanced lab equipment, including high‑bandwidth oscilloscopes, BERTs, protocol analyzers, logic analyzers, and pattern generators.
• Strong background in post‑silicon debug, root‑cause analysis, and driving issues to resolution across silicon, package, board, and software domains.
• Proficiency in scripting or programming (e.g., Python, Perl, TCL, C/C++) for validation automation and data analysis.
• Job Type:
• Regular
• Shift:
• Shift 1 (Malaysia)
• Primary Location:
• Penang 15, Penang, Malaysia
• Additional Locations:
• Posting Statement:

Additional Information

Job Details: Job Description: Own high-speed I/O validation , including defining and executing validation strategies across multiple programs. Develop, standardize, and maintain validation methodologies , test setups, and measurement flows to enable scalable and repeatable execution. Perform post ‑ silicon functional and electrical validation using state ‑ of ‑ the ‑ art lab equipment, including high ‑ bandwidth oscilloscopes, protocol analyzers, pattern generators, and logic analyzers. Collaborate with hardware board design teams on high ‑ speed channel implementation, including stack ‑ ups, routing strategies, and I/O termination topologies; review schematics, layouts, and board design guidelines. Partner with silicon design, package, board, and software teams to drive debug, root ‑ cause analysis , and issue resolution. Drive exploration and enablement of IP ‑ level and platform ‑ level validation methodologies, tools, and infrastructure to improve validation efficiency, coverage, and throughput. Focus primarily on high-speed analog I/O and PHY design including transmitters, receivers and voltage regulators for advanced DDR, LPDDR and MIPI interfaces as well as LVDS and GPIO designs.

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Company Intel

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