Principal SI/PI Design Engineer

Requirements

• BS in Electrical Engineering or Physics
• 5+ years hands on experience with IC package design
• Assets:
• Substrate design experience for RF, digital, high speed and mixed signal die
• Thorough understanding of signal and power integrity fundamentals
• Proficient in Advanced Package Designer (APD)+SIP and/or Xpedition Package Designer (XPD) tools (Cadence highly preferred)
• Fluent in SI/PI and EM simulation tools such as SIWave, HFSS
• Experience in package design electrical review, SI/PI analysis
• Experience in package design for manufacturing reviews
• Familiar with package substrate technologies including 2.5-D IC and 3-D IC interposers
• Problem solver with strong engineering fundamentals
• Pay Range:
• The annual salary range for this position is $157,100 - $250,900 USD.
• At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.
• Ciena is an Equal Opportunity Employer, including disability and protected veteran status.
• If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

Benefits

Additional Information

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We're a technology company that leads with our humanity-driving our business priorities alongside meaningful social, community, and societal impact. How You Will Contribute: As an SI/PI Design Engineer, you will be an integral part of the Ciena engineering team and lead the electrical package design for custom in-house photonic, analog, and digital ICs supporting next generation optical modules. Own and drive advanced package selection, new product BGA configuration and package structure Responsible for package/SIP layout, optimization, design verification and tapeout Interface and coordinate with cross-functional groups throughout Ciena on new product package selection, feasibility analysis and design Work cross-functionally, understand trade-offs, constraints, and optimizing silicon floor plan, bump and package pin out Simulate and optimize signal/power integrity and RF performance of the package design Interface and work with CMs and vendors for the sourcing existing designs and future product development

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