MLA Design Verification Engineer I, Annapurna Labs

Requirements

• Bachelor's degree in Electrical Engineering or a related field
• 1+ years of design verification experience using System Verilog and UVM
• 1+ years of experience in testbench development including stimulus, checkers, assertions and coverage
• Preferred qualifications
• Experience using multiple verification platforms: UVM test bench, FPGA, emulator, software environments, and system testing
• Experience with C/C++ and Object-Oriented Programming
• Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing
• Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.

Additional Information

At Annapurna Labs we are at the forefront of hardware co-design not just in Amazon Web Services (AWS) but across the industry. The work we do is cutting-edge and internet-scale while also being deeply important to our customers. We design and build every component of our hardware and software to come together into products that our customers use for accelerated computing: either Machine Learning acceleration, or FPGA acceleration. As a member of the Cloud-Scale Machine Learning Acceleration team, you will be responsible for the design and optimization of hardware in our data centers including technologies such as AWS Inferentia, which is a machine learning inference product designed to deliver high performance at low cost. If you are interested in "building a complete product" from inception to delighted customers, Annapurna is a fantastic choice. If this sounds exciting to you - come build the future with us! Key job responsibilities Some of your responsibilities will include verifying/validating that our hardware and software solutions achieve their desired functionality, developing and executing multi-faceted verification/validation plans, and measuring the teams progress towards our ambitious customer metrics. A day in the life 0

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