Senior DSP Engineer

Requirements

• Utilization of software tools including MS Office, MS Project, Confluence, Jira, and Eclipse
• Programming skills: CatapultC , Verilog, HTML . Must be willing to learn CatapultC and/or similar hardware design languages.
• Pay Range: The annual salary range for this position is $109,000 - $174,000 CAD.
• At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.
• Ciena is an Equal Opportunity Employer, including disability and protected veteran status.
• If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

Benefits

Additional Information

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We're a technology company that leads with our humanity-driving our business priorities alongside meaningful social, community, and societal impact. Ciena is advancing high-speed optical networking through innovative signal processing technologies that power global connectivity. This role contributes to the planning, design , integration and testing of next generation high-speed optical solutions . How you will make an impact: Define and document architecture of Ciena's leading edge modems based on functional specifications. Plan and schedule design tasks, specify required resources, tools and processes. Build and publish design guidelines, how‑to documentation, and setup guides. Lead code and document review meetings and publish outcomes Monitor, analyze, and improve design procedures Supervise and mentor junior engineers and provide technical feedback Collaborate with hardware, firmware, electro ‑ optics , systems, and lab teams Define and implement algorithms, measurement-/calibration procedures, and performance metrics for next generation modems. Code functions in Matlab /C++/ CatapultC according to generally accepted coding standards. Use standard lab equipment during ASIC integration & testing. Coordinate lab integration, prioritize daily meetings, and drive feature implementation The must haves: Education: Post ‑ graduate degree in Physics or Engineering with a focus on digital hardware, communication and/or control systems Experience: 5+ years of design, implementation, and verification of digital signal processing algorithms for ASIC or FPGA applications Demonstrated ability to work collaboratively as part of a team while independently driving assigned tasks Demonstrated attention to detail in technical work while maintaining adaptability in team environments Application of digital communication (optical and/or wireless) and signal processing concepts Application of modem design across architecture, simulation, prototyping, verification, integration, control, and optimization Experience with automated RTL code generation from high level system design languages such as CatapultC Programming using Matlab , C, and C++ in Linux environments Experience working in ESD ‑ protected lab environments and operating equipment such as oscilloscopes, signal generators, network analyzers, power supplies, and spectrum analyzers Ability to translate complex system requirements into discrete signal processing features through structured analysis and stakeholder communication

Your Match

How well this role fits your profile.

Company Intel

What employees say

Worked at ciena? Share your experience