Sr. Engineer, Ethernet IP

Requirements

• You are passionate about the "first few layers" of the stack. You'd rather debug a link-training state machine than a high-level application.
• You thrive on understanding the inner workings of Ethernet hardware (MAC/PHY/PCS) and how to control it efficiently via bare-metal firmware.
• You enjoy the "detective work" of hardware bring-up, using oscilloscopes or logic analyzers when the software behavior doesn't match the silicon's intent.
• You speak the languages of both the RTL team and the Network Software team, translating hardware constraints into software requirements.
• What We Need
• Develop and maintain low-level firmware to manage Ethernet MAC, PHY, and SerDes components.
• Drive silicon bring-up and validation of networking subsystems in the lab.
• Implement and optimize link-training algorithms and auto-negotiation protocols.
• Work closely with silicon architects to influence the design of next-generation networking hardware from a firmware perspective.
• Debug complex hardware-software interactions, including signal integrity issues and protocol-level timing bugs.
• What You Will Learn
• What it means to shape AI acceleration hardware and networking infrastructure from the ground up.
• How cutting-edge Ethernet technologies are integrated and optimized for large-scale AI systems and high-performance compute platforms.
• The mastery of collaborating with world-class silicon, systems, and software teams to solve frontier engineering challenges.
• How to help define the networking architecture that will power the next era of AI platforms.
• Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.
• Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

Additional Information

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. This role sits at the deep-tech intersection of silicon development, low-level firmware, and high-speed networking. You won't just be writing drivers; you'll be the bridge between our AI silicon and the network. You will work with best-in-class Ethernet IP and in-house designs to architect, enable, and optimize the firmware that powers next-generation AI infrastructure. The role is focused on the hardware-software boundary, spanning silicon bring-up, SerDes/PHY configuration, and performance tuning to ensure seamless, high-performance connectivity across complex, large-scale platforms. This role is hybrid, based out of Toronto, Canada or Vancouver Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

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