Advanced PKG Integration Engineer (semiconductor industry)

Responsibilities

• Process Integration & Architecture
• Architect and integrate post-FAB assembly flows , ensuring seamless transition from wafer fabrication to package-level execution
• Define and standardize Manufacturing Test Specifications (MTS) and Process Reference Plans (PRP)
• Drive cross-functional alignment across design, process, reliability, and manufacturing teams
• Advanced Packaging Development
• Lead development and commercialization of 2.5D/3D/3.5D packaging platforms , including heterogeneous multi-die integration
• Enable system-level integration across chiplets, interposers, and advanced substrates
• Translate product requirements into scalable packaging architectures
• Performance, Reliability & Failure Analysis
• Own electrical, thermal, and mechanical performance characterization
• Lead reliability qualification (JEDEC standards, stress testing, lifetime modelling)
• Conduct and interpret physical Failure Analysis (pFA) to drive yield and reliability improvements
• Design of Experiments (DOE) &Optimization
• Design and execute DOE frameworks to optimize critical process parameters
• Apply statistical analysis and data-driven methodologies to improve yield, performance, and manufacturability
• Program & Risk Management
• Define development roadmaps, milestones, and deliverables for new packaging technologies
• Identify and mitigate technical and integration risks across the product lifecycle
• Interface with internal stakeholders and external partners to ensure execution alignment
• Qualifications & Requirements
• Education
• Bachelor's degree or higher in Electrical Engineering or related discipline

Requirements

• 8-20 years in semiconductor packaging, process integration, or advanced assembly technologies
• Demonstrated ownership of full-cycle package development (concept → qualification → production)
• Technical Expertise
• Strong knowledge of MEOL, BEOL, and RDL processes
• Hands-on experience with CoW (Chip-on-Wafer) , CoP (Chip-on-Panel) , and advanced bonding/integration schemes
• Proven track record with large form-factor BGA, MCM, and high-density interconnect packages
• Process & Tooling
• Familiarity with PLM, YMS, G-SPEC, and OSCAR systems
• Deep process experience in CVD, CMP, wafer/die bonding, encapsulation, and molding technologies
• Industry Exposure
• Experience supporting AI, HPC, networking, or automotive semiconductor platforms
• Strong understanding of high-performance and high-reliability design constraints
• Communication
• Fluent in Korean with working proficiency in English for global collaboration
• Let's Talk
• Registration No. R1333447
• EA Licence No. 18C9464

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Company Intel

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