Senior Technical Lead -Power & BatteryLife

Requirements

• What we are looking for?
• B.Sc. in Computer Engineering, or Electrical Engineering.
• Minimum 2 years of Circuit, logic design or integration experience.
• Minimum 3 years of leading Power activities on Large Scale VLSI projects with Experience in power modelling methodologies and low power optimization.
• Advanced understanding of power considerations at architectural, block and circuit levels is benefit.
• In this highly visible role - strong communication skills are a pre-requisite as the candidate will interface with many of different groups and organizations.
• Advantage Requirements
• Understanding of BatteryLife related scenarios behavior up to system level
• major advantage
• Programming and/or SW development background (python programming skills is a benefit)
• Job Type:
• Experienced Hire
• Shift:
• Shift 1 (Israel)
• Primary Location:
• Israel, Haifa
• Additional Locations:
• Israel, Petah-Tikva
• Business group:
• Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.
• Posting Statement:
• Position of Trust
• N/A
• Work Model for this Role
• This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
• *

Additional Information

Job Details: Job Description: Designs, develops, and executes power and performance plans for IPs and SoCs. Identifies, builds, and maintains power, thermal, performance/watt optimizations, and characterizations for IPSoC power and performance goals. Conducts feature analysis from power and performance standpoint and drives to close any gaps between observed behavior and target on platforms in development. Provides recommendations for future architectures. Develops and enhances innovative tools for architectural performance analysis. Develops methodologies and models to drive continuous improvements in optimization of power and performance configurations to meet market requirements. Ensures platform and its components are optimized for performance and power balance. Identifies power activity zones and works with design, architecture, binning/technology, and manufacturing teams on ways to meet power consumption goals. Works cross functionally on analysis, validation, and tuning of architectures and features that advance the state of art in performance and efficiency.

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