Senior Staff Emulation Engineer

Requirements

• .
• BS in Computer Engineering, Electrical Engineering, or Computer Science with 5-7 years of emulation experience (or MS/PhD with 3-5 years of experience).
• Experience with SystemVerilog and UVM.
• Extensive knowledge of emulation platform offerings from leading vendors such as Synopsys, Cadence, and Siemens, with deep experience in building complex SoC and Subsystem emulation models.
• Hands-on experience developing emulation models using platforms from Synopsys, Cadence, and Siemens is required.
• Proficient in emulation bring-up, including reset sequence execution and firmware bring-up.
• Strong working knowledge in one or more of the following areas: processor architecture, SoC components, interconnect buses, I/O protocols (PCIe, CXL, Ethernet), and memory interface technologies (DDR, HBM).
• Skilled in scripting languages such as Perl, Python, Tcl, and UNIX shell.
• Proven ability to define emulation strategy and platform requirements, develop emulation test plans, and drive verification execution for large-scale products on platforms such as Veloce, ZeBu, and Palladium.
• Good programming skills, especially in C++ and ARM assembly.
• Other Skills:
• Diligent, detail‑oriented, and able to take initiative and handle assignments with minimal supervision.
• Able to work effectively with differing opinions and collaborate constructively.
• Open-minded and adaptable; not rigid in approach or thinking.
• Able to learn quickly and operate in a fast‑paced environment.
• Expected Base Pay Range (USD)
• 113,920 - 170,600, $ per annum
• The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
• Additional Compensation and Benefit Elements
• All qualifi

Benefits

Additional Information

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Custom Compute and Storage (CCS) Business Unit closely collaborates with strategic customers in the development of advanced and highly complex SoCs, from architecture and design all the way through layout, packaging, prototype validation and production ramp up. The Emulation Center of Excellence (CoE) team is key part of this group, with global ownership and responsibility for delivering emulation infrastructure, validating the design on emulation and drive left shift of SW and post-silicon readiness for all of CCS products. As part of the Emulation CoE team, you will drive the emulation strategy, vendor platform enablement, testplan execution for a high-quality design tape-out. What You Can Expect Build complex Subsystem emulation models, including design integration, environment setup, compilation, and debug across industry‑leading platforms (e.g., Veloce, ZeBu, Palladium). - Drive emulation bring‑up activities, including clock/reset sequencing, firmware boot, and system validation using pre‑silicon hardware models. -Execute emulation test plans to support verification, performance analysis, software development, and system validation needs across multiple teams. - Collaborate closely with Senior Emulation Engineers, RTL design, verification, and firmware teams to develop accurate hardware models, and ensure seamless integration into the emulation environment. - Debug complex SoC and subsystem issues across RTL, firmware, emulation platforms, and toolchain interactions. - Optimize emulation performance, including model partitioning, timing, and runtime efficiency. - Automate flows and improve productivity through scripting (Python, Perl, Tcl, shell) and tooling enhancements. - Interface with EDA vendors (Synopsys, Cadence, Siemens) to evaluate tool capabilities, resolve technical issues, and drive feature improvements.

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