ASIC DFT STA Engineer

Responsibilities

• Developing timing constraints at block, sub-chip, and full-chip levels in test modes, performing quality checks such as duplicated constraints, promotion/demotion between block and top level SDCs.
• Check timing for unconstrained endpoints, no clock, etc.
• Your role may include SDC validation, CDC check, and SDC flow development.
• Developing methodologies, guidelines, and checklists to streamline STA work, resolve design and flow issues, and drive execution to ensure progress and accuracy.

Requirements

• Bachelors + 7 years of related experience, or Masters + 4 years of related experience, or PhD + 1 year of related experience.
• Prior working experience with RTL design, CDC/RDC and conformal verification, SDC development.
• Prior working experience in timing constraint development and verification.
• Prior programming experience with at least 2 or more of the following scripting languages: Perl, TCL, Python, or Makefile.
• Masters degree + 10 years of relevant experience.
• Prior working experience in debugging and analyzing PCIE timing constraints, TSMC memory timing constraints.
• Prior working experience in debugging and analyzing timing constraints, timing closure of DFT modes such as scan shift/capture and BIST.
• Prior working experience with SDC debugging & STA tools like Synopsys TCM/Primetime.
• Prior working experience with synthesis tools: Synopsys Fusion/design Compiler.
• Prior working experience with Tessent tool like DFT insertion in RTL.
• Why Cisco?
• We are Cisco, and our power starts with you.
• Message to applicants applying to work in the U.S. and/or Canada:
• The starting salary range posted for this position is $165,000.00 to $241,400.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.

Benefits

Additional Information

The application window is expected to close on: 08/25/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . Meet the Team The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco's core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms-like Silicon One-are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development-from design to qualification to production-is within our team, we're able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.

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Company Intel

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