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CPU Circuit Design Lead

External
Intel logoIntel · Bangalore, India
Full-timeHybrid1w ago
CompliancePerlPythonVerilog
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Requirements

  • You must possess a Masters Degree in Electrical or Computer Engineering with atleast 8 or more years of experience in related field or a Bachelors Degree with atleast 10 years of experience. Technical Expertise in synthesis, P and R tools preferred.
  • Digital Design Experience, with High Speed, Low Power.
  • Familiarity with Verilog.
  • Tcl, Perl, Python scripting.
  • Good understanding of spice simulations and analysis
  • Strong verbal and written communication skills.
  • Job Type:
  • Experienced Hire
  • Shift:
  • Shift 1 (India)
  • Primary Location:
  • India, Bangalore
  • Additional Locations:
  • Business group:
  • Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.
  • Posting Statement:
  • Position of Trust
  • N/A
  • Work Model for this Role
  • This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
  • *

Additional Information

Job Details: Job Description: You will be part of ACE India , in the P- Core design team driving Intel's latest CPU's in the latest process technology. In this position, you will be responsible for leading the design analysis and methodologies of the different types of memory blocks and data path subsystems. Your responsibilities will include but not limited to: 1. Responsible for methodology enablement for memory blocks to meet over 5GHz Freq and low-power digital designs with optimal area. 2. In depth understanding of different memory design concepts ((SRAM/RF/ROM). 3. Expertise in Static timing analysis concepts. 4. Close work with Layout and Floor planning teams. 5. Back-end design implementation of new features. 6. Expertise in Memory post silicon analysis. 7. Good understanding of statistical variation.


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