AI Chip Architect

Responsibilities

• Define architecture/microarchitecture specifications. Take ownership of one or more chip modules and implement them in RTL.
• Converge functionality and PPA of the design.
• Implement your designs in RTL (System Verilog or other HDLs) and iterate the design for optimal power, timing, and area.
• Create simple test benches and debug complex logic simulations.

Requirements

• Master's degree in Electrical Engineering, Computer Science or equivalent practical experience.
• 2+ years of industry experience in chip design, specializing in RTL design (architecture and implementation), logic synthesis, verification, and timing closure
• Experience in microprocessor simulator implementation in depth with C++ or other high-level languages
• Experience in modeling PPA of the design
• Experience in scripting languages to automate simulation and analysis
• Ph.D in Electrical Engineering, Computer Science or equivalent practical experience is a plus
• Experience in accelerator design is a plus
• Experience with highly pipelined designs, and with multiple-clock-domain designs.
• Knowledge of machine learning algorithms, compiler, processor design, accelerators, and/or memory hierarchies.
• Experience with Chisel or RISC-V is a plus
• Contact
• recruit@furiosa.ai

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Company Intel

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