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Staff FPGA Engineer

External
Axiado logoAxiado · Taipei, Taiwan
Full-timeOn-site1mo ago30+ days old, may be filled
CI/CDComplianceFPGAVerilog
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Responsibilities

  • End-to-End Testing: Validate high-speed SPI, eSPI, and LTPI interfaces between the security processor, BIOS, and BMC to ensure absolute signal integrity and strict protocol compliance across all power states.
  • OEM Mode Logic: Design, implement, and verify specialized FPGA logic to support OEM mode configurations and secure manufacturing/provisioning flows.
  • Project & Tooling Integration: Utilize and extend project-based workflows for hardware description and verification, ensuring that FPGA designs are integrated into the wider system-level CI/CD and simulation environments.
  • Vendor & Ecosystem Collaboration: Demonstrate the ability to communicate effectively with IP vendors to resolve complex integration issues and develop customized application layers tailored to Axiado's unique security architecture.
  • Hardware Debugging: Utilize high-speed oscilloscopes, logic analyzers, and internal FPGA debugging tools (e.g., Vivado ILA) to identify and fix physical layer and protocol-level bottlenecks.
  • Protocol Expertise: Deep hands-on experience with SPI, eSPI, LTPI, and I2C/I3C protocols, including an understanding of timing requirements and electrical characteristics.
  • FPGA Design: Proficiency in Verilog or SystemVerilog for targeting Xilinx, Intel, or Lattice FPGA architectures.
  • Application Development: Familiarity with customized application development at the hardware-software interface, allowing for flexible implementation of proprietary features.
  • Communication: Strong technical communication skills to act as the primary point of contact for external IP providers and internal firmware teams.
  • Education: BS/MS in Electrical Engineering, Computer Engineering, or a related technical field.
  • Preferred Skills:
  • Experience with Open Compute Project (OCP) DC-SCM standards.
  • Understanding of Root of Trust (RoT) and secure hardware handoff sequences.
  • Familiarity with Project-based workflows or similar modern hardware description methodologies.
  • Additional Information
  • Axiado is committed to attracting, developing, and retaining the highest caliber talent in a diverse and multifaceted environment. We are headquartered in the heart of Silicon Valley, with access to the world's leading research, technology and talent.

Benefits

Vision insuranceFlexible schedule

Additional Information

We are seeking a highly skilled FPGA Engineer to focus on the critical communication paths of our security processor. This role is central to ensuring that our hardware interacts seamlessly and securely with the broader server ecosystem (BIOS, BMC, and Host). You will be responsible for implementing OEM-specific logic and performing rigorous end-to-end validation across high-speed serial interfaces.


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