Digital Logic + Design Verification Graduate Co-Op Program (US - Fall 2026)

Requirements

• Required:
• Currently enrolled in a Master's or PhD program in Electrical Engineering, Computer Engineering, or a related field
• Strong foundation in digital logic design and computer architecture
• Familiarity with HDL languages such as Verilog or SystemVerilog
• Strong problem-solving, analytical, and communication skills
• Preferred:
• Exposure to UVM or formal verification methodologies
• Experience with RTL design, simulation, or FPGA-based projects
• Knowledge of scripting languages (Python, Perl, TCL, or shell)
• Familiarity with SoC design concepts or high-speed interfaces (e.g., PCIe, DDR)
• Prior internship or academic project experience in digital design or verification
• Marvell's Co-Ops are onsite roles in office five days a week. This program is a good match for those that can step away from their academics for a semester. Please discuss this role with your trusted mentors and advisors prior to applying/interviewing to ensure alignment.
• Expected Base Pay Range (USD)
• 35 - 70, $ per hour.
• The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
• Additional Compensation and Benefit Elements
• All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
• Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com .
• Interview Integrity
• To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
• These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to

Benefits

Additional Information

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell's Digital Logic & Design Verification Graduate Co-Op Program offers hands-on experience developing next-generation semiconductor technologies. This role is designed for students interested in digital IC design, SoC architecture, and verification methodologies, working on high-performance chips used in the scale up and scale out of AI data centers and other enterprise level applications. This team hires some of the biggest problem solvers in Silicon and has a huge impact on the work done at Marvell. You'll be working on chips that ship to some of the largest enterprise applications globally. Co-ops will gain exposure across the design lifecycle-from RTL development to simulation, verification, and silicon validation-while collaborating with cross-functional engineering teams. What You Can Expect Digital Design: Contribute to RTL design and implementation of digital logic blocks for ASICs/SoCs Support micro-architecture development, design specification, and implementation Assist with synthesis, timing analysis, and design reviews Collaborate with verification and physical design teams to ensure design quality Design Verification: Develop and execute verification test plans for digital and SoC designs Build simulation environments, testbenches, and verification components Debug simulation failures and analyze coverage Work closely with design engineers to ensure functional correctness and performance Cross-Functional: Use industry-standard tools such as Verilog/SystemVerilog, UVM, and scripting languages Automate workflows and analyze data using Python or similar tools Support end-to-end chip development from architecture through validation Collaborate with global engineering teams on leading-edge semiconductor products

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