Senior Process Engineer

Responsibilities

• Own development of wafer prep and die-level packaging processes: bumping, dicing, sub-micron precision bonding, sub-micron optical alignment, flip-chip die bonding, wire-bonding, dispense, fully-automated final assembly and associated materials
• Own tool selection, materials selection, recipe development, and statistical process control limits to transfer processes from R&D to volume production
• Translate package and product designs into high volume production processes and collaborate with electrical, mechanical, and photonic circuit design teams to design-for-manufacturing
• Design production processes from the lab bench through proof of concept and production ramp
• Establish process limits and feedback process constraints as design rules to design teams
• Characterize parts with x-ray, FIB cut/SEM, CSAM, and die shear testing, closing the loop with electrical, mechanical, and photonic circuit design teams
• Act as the technical owner for failure-analysis findings, root cause analysis, and corrective actions
• Push process yields above 99.9% and thermal-cycle reliability for years-long qualification
• Provide technical mentorship as we work to build up high-volume semiconductor packaging process engineering in the US

Requirements

• MS or PhD in Materials Science, Chemical Engineering, Electrical Engineering, or similar
• Extensive (MS + 2 years) hands-on semiconductor process-development experience
• Strong troubleshooting skills and hands-on experience in semiconductor packaging, assembly, or advanced manufacturing environments
• Demonstrated success qualifying processes such as flip-chip bonding, wafer processing, plasma cleaning, and wire bonding
• Expertise in statistical quality control and process improvement methodologies, with experience leading internal audits and driving continuous improvement
• Comfortable working in a cleanroom or controlled manufacturing environment with cross-functional engineering teams
• Willingness to work extended hours and weekends as needed
• PREFERRED EXPERIENCE
• 5+ years of fab or wafer level packaging experience (e.g. lithography, etch, CVD, CMP, solder bumping, wafer dicing)
• Experience integrating photonic devices into complex opto-electronic packages, sub-µm die-bonding, wafer prep, and materials used in advanced packaging
• COMPENSATION AND BENEFITS:
• Pay range:
• Senior Process Engineer: $140,000.00 - $180,000.00/per year
• Title and base salary are determined on a case by case basis commensurate with experience and merit.
• In addition to base salary, compensation for this role includes:
• Eligibility for long-term incentives including company stock options and discretionary bonuses awarded for exceptional achievements.
• Comprehensive medical, vision, and dental insurance with significant cost covered by the company for yourself and dependents.
• Paid parental leave and flexible PTO (3 weeks accrued vacation and 10 company holidays per year).
• 401(k) retirement plan access.
• Relocation assistance to sunny Los Angeles.

Benefits

Additional Information

SENIOR PROCESS ENGINEER Mesh Optical Technologies was founded on the belief that optical photons will be at the center of advanced technologies in the coming century. Making advanced technology ubiquitous means building at scale, and that's exactly what we're doing at Mesh. Our products require semiconductor-grade packaging processes-bumping, dicing, precision bonding, optical alignment, and automated assembly-executed at yield levels and volumes that demand real process engineering discipline. We are seeking a Senior Process Engineer to own the development and qualification of these processes from R&D through production ramp, and to help build high-volume semiconductor packaging process engineering in the US.

Your Match

How well this role fits your profile.

Company Intel

What employees say

Worked at meshopticaltechnologies? Share your experience