Senior Integrated Circuit Designer - Layout

Requirements

• At least a bachelor's degree in electrical engineering
• Required Experience:
• 2+ years of experience in the development of layouts for highspeed analog IC designs in finFET technology.
• Experience with layout extraction tools and to analyzing layout parasitic to achieve high quality layout for highspeed circuits.
• EMIR and antenna DRC rules aware layout practices.
• Experience writing SKILL and TCL scripts is highly recommended

Additional Information

The company seeks a highly motivated and team-oriented individual to work with both layout and design engineers across multiple time zones As an Integrated Circuit Designer, you will be part of a key team designing and developing sophisticated advanced node CMOS products. Key Job Duties: The design and development of the layout for integrated circuits according to electronics engineering principles, using software to create design schematics and diagrams. This will include [floor planning, creating layouts of building blocks and integrating layouts for circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, and CDRs in advanced CMOS nodes. Your focus will include minimizing parasitic and skew, matching, EMIR, and antenna rules on top of DRC and LVS] The management of manufacturing process of the products, including technology yield and performance of the products. The development of test programmes and procedures to ensure the products meet their performance specifications. The provision of advice on aspects of semiconductor process technology and maintain and repair semiconductor process equipment.

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Company Intel

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