ASIC Engineering Technical Leader

Responsibilities

• Review micro-architecture specifications
• Supervise verification team members and provide professional guidance
• Implement Verification environment UVM based
• Collaborate with Design engineers to resolve bugs and achieve coverage closure
• Work with the firmware/Lab teams to verify chip flows
• Perform debug, root-cause analysis, and post-silicon validation in the lab

Requirements

• B.Sc./M.Sc. in Electrical Engineering from a top university
• 10+ years of experience in the filed
• knowledge with UVM and functional verification methodologies
• Experience with MATLAB simulations and bit-exact modeling environments
• Familiarity with mixed-signal systems and environments
• Knowledge and hands-on experience with GLS
• Why Cisco?
• We are Cisco, and our power starts with you.

Additional Information

Meet the Team Join the Cisco Silicon One Front-End Design team, at the core of Cisco's silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation. We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of what's possible. Cisco Silicon One™ is transforming the industry with a unified, programmable architecture powering Cisco's future routing portfolio and shaping the Internet for decades to come.

Your Match

How well this role fits your profile.

Company Intel

What employees say

Worked at Cisco? Share your experience