Technologist, Product Development Engineering

About the role

Sandisk is seeking an accomplished and highly technical Technologist, Product Development Engineering to lead the development, qualification, and production readiness of next‑generation memory and storage products. This role is critical in ensuring product quality, reliability, yield, and cost competitiveness across the full product lifecycle-from early silicon bring‑up through high‑volume manufacturing. As a Technologist, you will serve as a technical authority within Product Development Engineering, influencing product architecture, validation strategy, test methodology, and system‑level behavior. The ideal candidate brings deep semiconductor domain expertise, strong programming and data analysis capabilities, foundational AI/ML skills applied to engineering problems, and proven technical leadership. This role requires solving complex, cross‑layer issues spanning silicon, test, and system interactions while mentoring engineers and driving technical excellence across teams. ESSENTIAL DUTIES AND RESPONSIBILITIES: Product Development & Qualification Lead product development, characterization, and qualification activities for advanced memory and storage technologies from NPI through high‑volume production Define and execute comprehensive validation strategies aligned with quality, reliability, and manufacturability objectives Own technical readiness assessments, identify risks, and drive mitigation plans to enable on‑time and high‑quality product releases Technical Leadership & Failure Analysis Serve as a technical authority for complex electrical, functional, and system‑level issues encountered during development and production Lead deep‑dive failure analysis and root‑cause investigations across silicon, test, firmware, and system domains Drive cross‑functional corrective action plans and ensure lessons learned are embedded into future designs and workflows Test Engineering & Methodology Architect and optimize test flows, coverage strategies, and screening methodologies using Automated Test Equipment (ATE) Drive Design for Test (DFT) methodologies into product and test implementations Partner with test engineering, design, firmware, and manufacturing teams to deliver scalable, cost‑effective, and robust test solutions Data, Software, and AI/ML Enablement Leverage large‑scale test and manufacturing data to identify trends, accelerate debug, improve yield, and reduce test cost Develop automation, analysis, and infrastructure tools using Python, C, or C++ Apply foundational AI/ML techniques and statistical methods to enhance test optimization, anomaly detection, and failure analysis Cross‑Functional Collaboration Collaborate globally with design, device, firmware, system, manufacturing, quality, and reliability teams Communicate complex technical findings clearly to diverse audiences, including senior technical leadership Influence technical decisions using strong engineering judgment and data‑driven recommendations Mentorship & Technical Excellence Mentor engineers and technologists, strengthening technical fundamentals, ownership, and analytical rigor Lead technical reviews, design discussions, and post‑silicon analysis forums Promote a culture of innovation, engineering discipline, and continuous improvement REQUIRED: Master's degree or higher in Electrical Engineering or a closely related technical field Minimum of 8 years of relevant industry experience in semiconductor product development, test engineering, reliability engineering, or a related technical discipline Deep expertise in NAND, DRAM, or SSD technologies , including device‑level behavior, controller interaction, and system‑level performance characteristics Proven proficiency with Automated Test Equipment (ATE) platforms such as Advantest or Teradyne Strong programming skills in Python, C, and/or C++ , with hands‑on experience in automation, test development, and large‑scale data analysis Foundational knowledge of AI/ML concepts , with practical experience applying machine learning or statistical techniques to test optimization, yield improvement, failure analysis, or manufacturing data analytics Demonstrated experience driving Design for Test (DFT) methodologies into product design, validation, and manufacturing test flows Demonstrated technical leadership , including mentoring engineers, leading complex technical initiatives, and influencing cross‑functional teams Preferred Qualifications & Skills Experience with advanced memory nodes and scaling challenges , including 3D NAND or advanced DRAM generations Strong understanding of high‑speed interfaces such as JEDEC, ONFI, or Toggle Exposure to system‑level validation , platform bring‑up, or end‑to‑end storage solution integration Experience with yield ramping, manufacturing learning cycles, and test cost optimization in high‑volume production environments Familiarity with applying advanced AI/ML techniques (e.g., anomaly detection, classification, regression, clustering) to large engineering da

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