Standard Cell Layout Engineer

About the role

We are looking for result-driven candidates who would thrive under a fast-pace working environment and having a strong desire to make an impact in the organization. Job Responsibilities: Implement high quality Standard Cell layouts (basic, combinational, complex and customized cells) which meets designers and layout leads specifications, while achieving project objectives and milestones Integrate all standard cells, perform final physical verifications, QA checks and ensure database compliance with tape-out flow requirements Collaborate with multi-functional team members to optimize layout realization according to the desired power, performance and area within the stipulated schedule

Requirements

• Bachelor's degree in Electrical/Electronic/Computer Engineering or equivalent
• At least 2 years experience in Standard Cell Library layout implementation
• Proficient in understanding DRM of advanced CMOS technologies
• Experienced in physical verification checks (DRC, LVS, ERC)
• Strong knowledge in floor-planning and optimizing complex Standard Cells considering power, performance, area, clock network, critical paths, and routability
• Proficient in Synopsys/Cadence layout editor and physical verification tools
• Knowledge in script programming (Tcl, Perl or C-shell) for layout automation and in-house rules creation is a plus
• Effective team player with strong cross-team communication and time management skills
• Interested candidates may apply through the application system. We regret to inform only Shortlisted candidates will be notified.
• PERSOL Singapore Pte Ltd - RCB No. 200007268E - EA License No. 01C4394 - EA Registration No. R1877971 (Derrick Tiew Yong Han)

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