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Senior Principal C++ Software Engineer

External
Cadence logoCadence · San Jose
$154K–$286K/yrFull-timeOn-site3d ago
FPGAPrototyping
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Responsibilities

  • Enhance and support Timing Engine to add new features and extend existing features
  • Enhance and support Timing Flow to improve P&R compile time
  • The role involves designing, tuning, and innovating timing graph algorithms and flow operating on multi‑billion‑node timing graphs
  • Write Specifications and Unit Tests for your code
  • Position Requirements/Qualifications:
  • BS with a minimum of 10 years of experience OR MS with a minimum of 7 years of experience OR PhD with a minimum of 5 years of experience
  • Experience in EDA software development.
  • Strong background in SDC constraints and Timing Analysis
  • Excellent programming skills in C/C++
  • Strong knowledge of Tcl is preferred
  • Experience in multi-threaded/ concurrent programming are pluses.
  • Prior experience with Emulation or FPGA software development is an added plus.
  • We're doing work that matters. Help us solve what others can't.

Benefits

Dental insuranceVision insurance401(k)Paid time offEquity / stock optionsPerformance bonus

Additional Information

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. We are looking for an experienced C++ software engineer to join the Protium Software Development Team to develop and enhance the FPGA-Based Prototyping product which is used by leading CPU/GPU/HyperScaler companies for pre-Silicon software validation of their SOC's. You will develop new algorithms and optimizations for QoR (Quality of Results) and performance for the Protium Timing flow working with a small team of engineers to develop our next generation FPGA based verification platform.


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