Principal Engineer, Design Verification

Requirements

• Bachelor's degree in CS/EE with 13+ years of relevant experience, or Master's degree in CS/EE with 11+ years of relevant experience
• Strong background in IP verification, including methodology and testbench development
• Proficient in hardware verification languages such as Verilog, SystemVerilog, UVM, and C/C++
• Solid understanding of verification methodologies: object-oriented programming, white-box/black-box testing, directed/random testing, coverage analysis, and gate-level simulations
• Experience in Unix/Linux environments; scripting skills in Shell, Perl, or Python are a plus
• Strong analytical and problem-solving skills
• Ability to manage multiple tasks in a fast-paced environment
• Excellent communication, interpersonal, and teamwork skills
• Capable of interfacing effectively at all levels within and outside the organization
• Proactive in participating in problem-solving and quality improvement initiatives
• Experience in working on processor-based subsystems
• Experience in working on HW Security is desirable
• Additional Compensation and Benefit Elements
• All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
• Interview Integrity
• To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
• #LI-CP1

Additional Information

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Data Centre Engineering Group develops Custom Silicon products tailored for the Data Centre market, focusing on cutting-edge Accelerated Infrastructure solutions for Networking, Switching, Connectivity, and Compute. The team works on high-performance and scalable architectures, ensuring optimized performance, power efficiency, and reliability to meet evolving data center demands. By collaborating across multiple teams, the group delivers best-in-class silicon solutions that drive innovation in next-generation data center applications. What You Can Expect Architect and implement simulation test bench in UVM. Develop and execute test-plans for verifying correctness and performance of the design. Own and debug failures in simulation to root-cause problems Closely work with logic designers of the block being verified for test plan development, execution, debug, coverage closure and gate level simulations

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Company Intel

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