Analog IC Design Engineer, Senior Principal Engineer

Requirements

• Master's degree and/or PhD Preferred in Electrical Engineering or related fields with 10+ years of experience. A successful candidate should have experience in some of the following designs:
• PLL, Data Converters, Oscillators and high-speed SerDes design including Receiver and Transmitter design.
• Experience in Single-ended High Density Parallel Interface for Chip to Chip Communication, DDR5/LPDDR5; GDDR6/LPDDR6 a plus
• Experience with analog design and verification tools (Virtuoso, Spectre, ADE and post layout extraction tools) is a must
• Knowledge of the fundamentals on signal integrity improvement, noise reduction and Multi-GHz low-jitter clock generation & distribution.
• Good understanding of analog layouts in FinFet and its effect on high-speed designs
• Experienced in system level pre-tape out analog validation
• Experienced in lab chip bring-up and debugging efforts
• Strong communication skills
• Expected Base Pay Range (CAD)
• 191,600 - 255,400, $ per annum
• Additional Compensation and Benefit Elements
• All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
• Interview Integrity
• To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
• Marvell may employ artificial intelligence technologies to assist in the evaluation of job applications. All application reviews include meaningful human involvement, and no hiring decisions are made solely on the basis of automated processing.
• #LI-TD1

Additional Information

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. This is an existing vacancy. Your Team, Your Impact Central Engineering - AMS IP What You Can Expect Seeking a Principal Analog IC Designer to be part of a Marvell's central engineering team designing highly sophisticated CMOS transceiver/SERDES/PLL products. Responsibilities would span architectural investigations and implementation for circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs etc. to meet key performance targets and performing design verification using industry standard tools such as SPICE, Spectre, MATLAB etc. In this role, successful candidate will lead a team of analog design engineers, interface with layout, verification, and application teams and manage delivery of analog IP to successfully bring designs from concept to production.

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