Sr Staff Analog Modeling/Verification Engineer

Requirements

• MS in Computer/Electrical Engineering with 5+ years of relevant industry experience.
• Good understanding of CMOS analog circuit design.
• Verilog/SystemVerilog modeling of functional behaviors of analog circuits.
• Strong EDA tool experience, such as Cadence Virtuoso.
• Hands-on experience of using Cadence tools to verify analog mixed-signal designs.
• Basic scripting language skills, such Python.
• Good communication skills to interact with other design teams.
• Expected Base Pay Range (USD)
• 135,900 - 201,130, $ per annum
• The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
• Additional Compensation and Benefit Elements
• All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
• Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com .
• Interview Integrity
• To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
• #LI-AR3

Benefits

Additional Information

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Optical PHY (CE-OPHY) team designs high-speed and optical transceivers for communication infrastructure in long-haul, metro and datacenter. We address the bandwidth, capacity and power issues faced by cloud computing, mega data centers that powers the social media giant platforms. Our innovative approaches have resulted in the company's products being first to market in many of key areas, developing the most advanced chips and subsystems solutions to address the ever-increasing demand of higher data rates driven by video-on demand, gaming and other real time data streams. We are seeking talented individuals to work on solving technical challenges with the most outstanding group of collaborators in the industry. This is a rare foundational opportunity as part of our strategic expansion into Southern California. You will help shape the technical DNA and culture of Marvell's San Diego design organization. What You Can Expect Creating Verilog/SystemVerilog behavioral models of analog circuits. Creating programming sequences to verify analog circuit behaviors. Providing support to analog model users for model bring up. AMS simulations to verify leaf cell functionality.

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