Have fundamental understanding of electrical concepts, likely acquired through a degree in Electrical Engineering (graduate or undergraduate).
Know how to use CAD tools to do the implementation layers, microelectronic layers in design that go beyond the schematics.
Track record of delivering high-speed or precision analog circuits, preferably in multiple process nodes
Have ownership through the full development cycle: floorplan, layout, verification, delivery, and support
Assume more responsibility and ownership of tasks, from cells to functional blocks, to higher-level macros, to full interfaces or chips
Have excellent communication skills to give status updates to your team, present to global teams in different time zones, and to share information with many different levels of personnel at Marvell
Expected Base Pay Range (CAD)
103,100 - 137,400, $ per annum
Additional Compensation and Benefit Elements
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
Marvell may employ artificial intelligence technologies to assist in the evaluation of job applications. All application reviews include meaningful human involvement, and no hiring decisions are made solely on the basis of automated processing.
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Additional Information
About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
This is an existing vacancy.
Your Team, Your Impact
CE analog layout team is responsible for delivering high-quality, optimized layouts that meet stringent performance, area, and power specifications. Our group works collaboratively across multiple disciplines to ensure the successful realization of cutting-edge semiconductor products.
What You Can Expect
Working with global teams across Argentina, Singapore, the U.S., and Europe, you will run simulations and verifications using Cadence Virtuoso, collaborating closely with the designer to refine and debug iteratively until the design meets specifications. Project durations vary from a few months to a year and a half with flexibility to switch based on changing priorities is appreciated.
Regular meetings with your paired designer ensure collaborative information sharing, integral to Marvell's commitment to partnership and teamwork. As a key contributor, you play a crucial role in the project lifecycle, participating in routine meetings as a technical mentor, layout team, and the broader project team. These interactions include updates on progress and may involve presenting specific issues or solutions encountered during the development of cutting-edge technologies. The dynamic nature of our work ensures continuous learning and knowledge-sharing among colleagues.