Define top-level or cross-subsystem digital architecture for Satellite communication ASICs and SoCs.
Lead hardware realization of key communication functions such as modem pipelines, coding engines, digital beamforming, switching fabrics, and packet/data processing.
Drive end-to-end technical planning from concept through silicon validation.
Establish system-level tradeoffs among throughput, latency, power, die area, reliability, and manufacturability.
Provide technical leadership across design, verification, physical design, firmware, packaging, and system teams.
Review and influence architectural partitioning between ASIC, FPGA, software, and RF/analog domains.
Develop methodologies and reusable IP strategies that improve schedule, quality, and scalability.
Mentor technical leaders and act as a go-to expert for critical design reviews and issue resolution.
Support roadmap planning and future product definition.
Requirements
BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field.
12+ years of ASIC design experience, including ownership of complex chips or multiple tape-outs.
Expert-level knowledge of digital design, microarchitecture, and full-chip tradeoffs.
Proven success leading technically exciting silicon programs.
Strong understanding of communication signal-processing hardware and system integration.
Ability to influence across organizations and communicate complex technical topics clearly.
Deep expertise in Space based communications, digital modems, phased arrays, or payload processing.
Experience in advanced FEC architectures, timing recovery, carrier recovery, or channel adaptation hardware.
Familiarity with rad-hard, fault-tolerant, or high-availability digital design techniques.
Experience guiding architecture across both commercial and mission-critical applications.
Strong record of innovation, patents, publications, or major product launches.
Compensation Range for:
CA applicants is $249,235.00 - $348,928.65
WA applicants is $249,235.00 - $348,928.65
Other site ranges may differ
Culture Statement
Export Control Regulations
Applicants for employment at Blue Origin must be a U.S. citizen or national, U.S. permanent resident (i.e. current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.
Background Check
Required for all positions: Blue's Standard Background Check
Required for Certain Job Profiles: Defense Biometric Identification System (DBIDS) background check if at any time the role requires one to be on a military installation
Required for certain Job Profiles:
Benefits
Vision insurance
Additional Information
Application close date:
Applications will be accepted on an ongoing basis until the requisition is closed.
At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We're working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight!
Blue Origin is pioneering the future of space-based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide.
The Principal ASIC Design Engineer serves as a technical authority for the design of advanced ASICs enabling next-generation Satellite communication systems. This role is responsible for crafting architecture, guiding implementation strategy, and driving critical technical decisions across one or more silicon programs.
Blue Origin · TX