Principal Digital Validation Engineer

Responsibilities

• Lead post‑silicon validation efforts and collaborate with architects and design teams to develop comprehensive IP‑ and SoC‑level test plans.
• Own the architecture, development, and delivery of the RTOS‑based SDK (FreeRTOS and others), including BSPs, HALs, low‑level drivers, and middleware components.
• Drive first‑silicon bring‑up activities , perform in‑depth debugging, and manage regression testing.
• Demonstrate strong expertise in automotive communication protoco ls such as Ethernet (PTP, AN, EEE), CAN, LIN, FlexRay , as well as ARM architecture, bootloaders, SPI, I2C, and UART.
• Develop automated test solutions using Python, FPGA‑based frameworks, NI LabVIEW/TestStand, and VBA.
• Define characterization and validation test plan in collaboration with cross‑functional teams, working closely with system architects, hardware engineers, and safety teams.
• Provide actionable feedback to hardware teams and influence next‑generation RISC‑V CPU and SoC feature enhancements.
• Lead and mentor a team of validation engineers , offering technical direction, prioritization, and fostering a culture of ownership and accountability.
• Create, analyze, and validate test reports, ensuring timely review and alignment across global cross‑functional teams.
• Debug post‑silicon test failures and perform systematic root‑cause analysis to identify and resolve issues effectively.
• The Systems Validation Engineer is responsible for assuring all instrumentation, scripting and boards are prepared prior to silicon arrival on the bench.

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Company Intel

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