Bachelor's degree in Computer Science, Electrical Engineering or related fields and 15+ years of related professional experience. Master's degree in Computer Science, Electrical Engineering or related fields with 10-12 years of experience. PhD in Computer Science, Electrical Engineering or related fields with 8-10 years of experience.
Creating micro-architectural specs from standards, architectural specifications.
System Verilog RTL coding with System Verilog Assertions.
Universal Verification Methodology.
Creating modular/reusable design components.
Embedded micro-controller systems.
Ability to multi-task and must be flexible and adaptable to a rapidly changing and demanding environment.
Demonstrated success in project leadership.
Experience in the following areas is a plus: Ethernet, PCIe and CXL.
Knowledge of power conversions systems.
Expected Base Pay Range (USD)
182,360 - 273,200, $ per annum
The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com .
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
Benefits
Health insuranceFlexible scheduleEquity / stock options
Additional Information
About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
As a Digital IC Design Senior Principal Engineer with Marvell, you'll be a member of the Central Engineering's connectivity business group.
This team hires some of the biggest problem solvers in Silicon and has a huge impact on the work done at Marvell. The customers served by this team are often other chip companies and big tech companies, familiar names to all candidates.
What You Can Expect
- Design, develop, implement, verify, and document micro-architecture and RTL for complex power management integrated circuits.
- Work closely with system and chip architects to design industrial quality implementations.
- Participate in the full design development cycle, end-to-end, from writing micro-architecture docs, RTL coding, specifications of timing, closely work with design verification teams to review test plans and execution of test, ability to bring up block tests on silicon during lab testing, and maintenance of designed blocks and reusable IPs.
- Produce comprehensive block uArchitecture and register Specs.
- Schedule detailed reviews with cross-functional teams Evaluate and participate in improving design and verification methodologies.
- Supervise or mentor other digital design engineers.
Marvell · Santa Clara, CA