Master of Science (or a Master of Technology) degree in Electrical Engineering with more than four years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than six years of relevant industry experience.
Job Type:
Experienced Hire
Shift:
Shift 1 (India)
Primary Location:
India, Bangalore
Additional Locations:
Malaysia, Penang
Business group:
Posting Statement:
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
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Additional Information
Job Details:
Job Description:
Group Overview:
This group performs development of IP building blocks and methodologies for Intel's System On Chip ( SoC ) solutions for the different market segments.
Experience : Relevant ASIC design/validation experience in front end processes including RTL development, functional and performance verification
Expertise in design, development and integration of design blocks (IP) for system-on-chip ( SoC ) components.
Expertise in verilog and system verilog based logic design.
Experience in Design Quality check tools like linting, synthesis / timing closure, CDC, LEC etc
Experience in one/more of the following areas PCI_Express , and /or AMBA standards ( AXI, AHB etc..)
Knowledge of use of AI tools like Github Copilot.
Knowledge of SVA.
Knowledge of RAS domain is a plus.
Looking for highly motivated individuals and ability to deal with ambiguity.
Knowledge of considerations for performance, power and cost optimization is desirable.
Ability to work in a team environment.
Responsibilities : In this position, the candidate will be responsible for the microarchitecture and design of soft IP cores for Intel's next generation chips (including SOCs) for the different
Intel · Bangalore, India