Senior Customer Technical Enablement and Debug Engineer
External
Intel · California, Santa ClaraFull-timeHybridToday
Cross-functional CollaborationLeadershipLinux
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Responsibilities
- Customer-Facing Debug & Support
- Act as the primary technical point of contact for customer-reported issues
- Lead real-time triage, debug, and resolution of complex system issues in customer environments
- Communicate findings, status, and mitigation plans clearly to customers and stakeholders
- System-Level Debug (HW / FW / SW)
- Investigate and debug issues across the full stack: silicon, firmware, drivers, and system software
- Reproduce field issues in lab environments and drive end-to-end root cause analysis
- Identify failing components (HW/FW/SW) and coordinate resolution across teams
- Cross-Functional Collaboration
- Partner closely with architecture, design, validation, firmware, and software teams
- Drive escalations, align priorities, and ensure fast issue turnaround
- Contribute to debug methodologies, tools, and field-debug capabilities
- Customer Enablement & Continuous Improvement
- Support new customer use-cases and deployment enablement
- Improve debug workflows, visibility, and in-field diagnostics
- Capture and drive closure of systemic issues (escapees)
- Core Competencies
- Strong problem-solving and root cause analysis capabilities
- Ability to debug across multiple domains (HW + FW + SW)
- Excellent communication skills with external customers
- Ability to work under pressure and manage high-priority escalations
Requirements
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
- 5+ years of experience in system-level debug (HW/FW/SW)
- Strong experience with networking systems, drivers, and Linux environments
- Experience debugging complex silicon/system issues in lab or customer environments
- Post Graduate Degree in Electrical Engineering, Computer Engineering, or in a related field
- Knowledge of IPU / SmartNIC / data center networking architectures
- Experience with PCIe, RDMA, Ethernet, virtualization, or cloud infrastructure
- Familiarity with debug tools, logs, and low-level interfaces (JTAG, trace, dumps)
- Prior experience in customer-facing engineering roles
- Why This Role
- Direct impact on customer success and product deployment
- Work at the intersection of silicon, networking, and large-scale systems
- High visibility with both internal leadership and strategic customers
- Job Type:
- Experienced Hire
- Shift:
- Shift 1 (United States of America)
- Primary Location:
- US, California, Santa Clara
- Additional Locations:
- US, Oregon, Hillsboro
- Business group:
- Posting Statement:
- Position of Trust
- N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel .Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional faHealth insurancePaid time offEquity / stock optionsPerformance bonus
Additional Information
Job Details: Job Description: The Role and Impact Join Intel's IPU engineering team and play a critical role as the frontline technical interface with strategic customers. In this position, you will lead system-level debug and issue resolution for Intel's networking IPU deployments and work directly with customers to diagnose and resolve complex HW/FW/SW issues in real-world environments. This is a highly visible role combining deep technical expertise with customer engagement, where your work directly impacts product success, deployment quality, and customer satisfaction.
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Company Intel
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