Post silicon validation engineer

Responsibilities

• Ethernet & PCIe Validation: Hands-on bring-up of multi-rate Retimer ICs.
• Compliance & Interoperability: Validate Ethernet (100G/400G/800G) and PCIe (Gen 5/6) for IEEE and PCI-SIG compliance.
• Automation: Build Python-based automated test frameworks for Ethernet throughput, BER, and control path testing which includes ARM based micros and GPIO/MDIO/I2C protocols.
• Network Debugging: Root-cause complex silicon, link training, and firmware bugs using protocol analyzers and traffic generators.
• Technical Qualifications
• Ethernet Domain Knowledge: Expertise in Ethernet PHY architecture, PAM4/NRZ signaling, FEC (Forward Error Correction), Auto-Negotiation, and Link Training .
• Lab Equipment: Proficiency with high-bandwidth Oscilloscopes, BERTs, Ethernet Traffic Generators/Network Analyzers (e.g., Ixia, Spirent), and PCIe Analyzers.
• Programming/Scripting: Strong Python for lab automation and data analysis, plus C/C++ for low-level register manipulation.
• Education and Experience
• Bachelors in Engineering and 8+ years of related experience or Masters degree in Engineering and 6+ years of related experience
• Additional Job Description:
• Compensation and Benefits
• The annual base salary range for this position is $108,000 - 172,800.
• This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
• If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Benefits

Additional Information

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: We are seeking a Post-Silicon Validation Engineer to drive the bring-up, characterization, and debugging of our next-generation Ethernet and PCIe Retimer chips . This role heavily focuses on advanced Ethernet physical layer (PHY) validation, ensuring our silicon meets rigorous IEEE networking standards and high-speed interoperability requirements.

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Company Intel

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