Conduct detailed studies of chip architecture and micro-architecture to define, develop, and execute comprehensive pre-silicon test plans that thoroughly validate switch features.
Verify the design, architecture, and micro-architecture using emulation platforms.
Develop sub-system and chip-level tests using Tcl, ITcl, Python, and C/C++ to verify networking switch chips in emulation platforms.
Build and synthesize Verilog/SystemVerilog-based models for emulation platforms such as Zebu or Palladium.
Perform block, sub-system and chip/system-level debugging and root cause analysis for hardware and software issues, addressing pre-silicon challenges.
Develop and optimize automation scripts and emulation methodologies to improve efficiency, reusability, and coverage.
Create reusable synthesizable design blocks, libraries, and verification components to streamline emulation processes.
Build and maintain robust emulation environments that support a global user community.
Collaborate closely with Architecture, Micro-Architecture, Design, DV, and Software teams to achieve comprehensive verification coverage and smooth project execution.
What You Bring
Ability to define verification scope and contribute to the development of verification infrastructure for networking switches.
Experience collaborating with architects, designers, and software engineers to achieve verification goals.
Bachelor's degree with 2+ years in pre-silicon verification/emulation of networking ASICs.
Strong expertise in Verilog/SystemVerilog, C/C++, Tcl, Python, and scripting for automation.
Hands-on experience with emulation platforms (Zebu, Palladium), traffic generators (IXIA, Spirent), and high-speed interface protocols (e.g., PCIe, Ethernet) is desirable.
Strong debugging skills and familiarity with DPI transactors, assertions, and coverage-driven verification.
Verification engineers with simulation backgrounds are also encouraged to apply - strong verification fundamentals are highly valued.
Excellent communicator who thrives in a collaborative, fast-paced environment.
Additional Job Description:
Compensation and Benefits
The annual base salary range for this position is $81,000 - $120,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
Benefits
Dental insuranceVision insurance401(k)Paid time offEquity / stock optionsPerformance bonus
Additional Information
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Job Description:
The Core Switch Group (CSG) at Broadcom is the industry leader in cutting-edge networking ASICs, developing advanced protocols and delivering unmatched port density and bandwidth performance. Our team is behind iconic switching solutions like the Tomahawk and Trident series, setting benchmarks in the networking world.
Broadcom, a global innovator in fabless communications semiconductors, software, and systems, is proud to be recognized as one of Fortune magazine's "Most Admired Companies." We foster a culture that embraces change, values risk-taking, and thrives on tackling the impossible. At Broadcom, we reward innovation and initiative with competitive salaries, industry-leading benefits, and opportunities for growth in an open, collaborative work environment.
If you're a passionate engineer eager to shape the future of networking, Broadcom is where you can outdo, outsmart, and outperform. Join us and make an impact!
Broadcom · Usa-ca San Jose Innovation Drive