B.S. or M.S. degree in Electrical Engineering or equivalent experience.
5+ years of experience in high-speed digital design, proficient with front-end design flow and tools.
Deep understanding of Verilog or System Verilog, logic design concepts, and typical structures.
Good understanding of design for test, timing constraints, and static timing analysis.
Experience with industry verification methodologies, such as UVM.
Ways to stand out from the crowd:
Knowledge of optical transceiver devices and integrated components such as modulators, detectors, and TIAs.
Experience with SerDes architecture and building blocks such as CDR, DFE, CTLE, TXFIR.
Experience with digital assist analog designs, such as calibrations.
Familiarity with mixed-signal circuit design concepts and experience in behavior modeling of mixed-signal circuits. Knowledge of physical layer and communication protocols, such as Ethernet, InfiniBand, PCIe, and USB.
Understanding of on-chip microcontrollers and standard peripherals, with exposure to hardware and firmware co-design.
#LI-Hybrid
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits .
Applications for this job will be accepted at least until June 12, 2026. This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
Additional Information
NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to solve, that only we can take on, and that matter to the world. This is our life's work, to amplify human creativity and intelligence. Make the choice to join us today.
The mixed-signal high-speed I/O group delivers innovative PHY designs that power the most powerful AI systems in the world today. Our portfolio includes PHY IPs and Chips for both copper and fiber channels, supporting NVIDIA's high-performance interconnect protocols: NVLINK, Ethernet, and InfiniBand. We recently delivered the industry's first 200G MRM-based silicon photonics chip, revolutionizing high-performance networking and enabling the era of Co-Packaged Optics (CPO) for NVIDIA. We enable groundbreaking technology that continually pushes the limits of wireline communication!
Nvidia · Santa Clara, CA