Bachelor's degree in computer science, Electrical Engineering or related fields and 8+ years of related professional experience OR Master's degree and/or PhD in Computer Science, Electrical Engineering or related fields with 5+ years of experience.
Strong understanding of high-speed SERDES, equalization technique and PCIe protocols.
5+ years experience with High Speed IO testing, debugging and validation
Strong lab skills with hands on experience, in system bring up, system testing and debug.
In-depth working knowledge of test equipment used for SERDES characterization (Scope, BERT, Network analyzer, etc.).
Strong analytical, problem-solving and communication skills
Preferred/Plus:
Working knowledge of PCIe and/or SerDes electrical characterization.
Extensive knowledge of the physical and protocol levels (PIPE I/F, PCS, MAC) of one or more common high-speed interfaces is an asset.
Working knowledge of board design including schematic design and PCB layout for high speed Serdes
Expected Base Pay Range (USD)
150,680 - 225,700, $ per annum
The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com .
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the
Benefits
Health insuranceEquity / stock options
Additional Information
About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
The PCIe Gen 6, Gen 7 and High-speed Serdes product lines are built on a 10-year plus history of Marvell PAM4 technology leadership. Purpose-built to scale data center compute fabrics inside accelerated servers, general-purpose servers, CXL systems and disaggregated infrastructure, they features best-in-class SerDes performance, ultra-low power dissipation, low latency, and a rich feature set including advanced diagnostics and telemetry.
What You Can Expect
- Complete responsibility for PCIe/Serdes PHY Validation in post-silicon environment.
- Defining, documenting, executing and reporting the overall PHY validation/test plan for Marvell storage devices.
- Lead electrical validation of high-speed signal product.
- Lab-based silicon bring-up and unit test execution focused on Physical and PCS layer hardware and firmware functionality, while also extending to the protocol layer of the stack.
- Perform high speed signal validation and analysis using various test equipment to measure Eye diagram/Jitter/BER.
- Analyze and debug issues on Phy protocol of storage interface (PCIe, Ethernet)
- Troubleshoot failing tests with diagnostics, software tools, hardware analyzers, oscilloscopes, meters, logic/protocol analyzers.
- Leading collaborative technical discussions to drive resolution on technical issues Work with cross-functional teams and external vendors to debug any post-silicon and/or customer issues.
- Work closely with customers to address design issue and debug failure cases
Marvell · Santa Clara, CA